1. Field of the Invention
The technical field generally relates to an embedded substrate package structure.
2. The Prior Arts
As a response to the trend of continuous miniaturization of multi-function electronic products, various semiconductor package technologies have been developed. For example, by stacking chips in packaging, the size of the electronic products is reduced; by using high-density substrate to connect chip with chip, a multi-chip module (MCM) packaging can realize system and sub-system modularization. In addition, flip-chip packaging, system on a chip (SoC), system in a package (SiP) technologies are either widely used or considered as potentially highly applicable technologies.
U.S. Pat. No. 8,115,297 disclosed a substrate structure with die embedded inside and dual build-up layers over both side surfaces and method thereof. The structure includes a first substrate, having a die connected to a metal pad, and a first circuit and a second circuit, formed respectively on both side surfaces of the first substrate; a second substrate, having an opening for receiving the die, and a third circuit and a fourth circuit, formed respectively on both side surfaces of the second substrate. By using an adhesive glue to fill between gaps between the die and the first substrate, and between the die and the second substrate, and using laser to cut the back of the first substrate to form an opening to expose a metal layer on the back of the die.
It should be noted that in the aforementioned structure and manufacturing process, the die is electrically connected to the substrate in a facing-up manner; moreover, the back of the die is directly connected to the substrate. Also, after the die is placed properly, the glue filling process is performed to fix the die. Then, a redistribution layer (RDL) is formed, followed by wire connection. Hence, the packaging process is complicated.